1. Field of the Invention
The present invention relates to a method for producing a metal semiconductor field effect transistor, more particularly, to a method for producing a GaAs metal semiconductor field effect transistor with a short gate length.
2. Description of the Prior Art
A metal semiconductor field effect transistor (referred to as MESFET hereinafter), which is a Schottky gate type field effect transistor, may be adopted as an active element for amplifying a signal at ultra high frequency with a relatively higher gain and as an active element for a high frequency oscillating signal. It has been known to those skilled in the art that the MESFET has a superior performance compared with the other transistors when the MESFET is used as a fundamental element in an integrated circuit operated at ultra high speed. More particularly, a GaAs MESFET, whose semiconductor substrate is made of GaAs, has been a well-known device to the alternative Si device being used extensively now, since the GaAs MESFET performs in a superior manner and has a simple structure.
In general, GaAs MESFET is fabricated as follows. Firstly, a conductive semiconductor layer, which is generally called an "active layer", is formed in a GaAs substrate by implantation of impurity ions such as Si.sup.+ into the GaAs substrate, In order to reduce the parasitic resistance, further impurity ions are doped in a relative high concentration in the region of the GaAs substrate adjacent to the source and the drain electrodes. Then the MESFET is annealed at a high temperature so as to activate the doped ions. Then, after a source electrode, a drain electrode, and a gate electrode are formed on the GaAs substrate, the GaAs MESFET is fabricated. Recently, with a refractory gate electrode and a dummy gate electrode, a high impurity concentration region is self-alignedly formed adjacent to the gate region, then the fabricated MESFET has improved electrical performance.
FIG. 1 shows a conventional MESFET structure which has been extensively used. As shown in FIG. 1, an active layer 22 is formed on a high resistivity semiconductor crystal substrate 21, and a Schottky gate electrode 24, an ohmic contact source electrode 27 and a drain electrode 28 of ohmic contact are respectively formed on the upper surface of the active layer 22.
The electrical characteristics of the MESFET are indicated by the following transconductance gm and cut-off frequency f.sub.T. EQU gm=K(V.sub.g -V.sub.t) (1) EQU f.sub.T =gm/(2.pi.Cgs) (2)
where EQU K=(Z.epsilon..mu.)/(2aLg) (3)
V.sub.g is the gate voltage. PA1 V.sub.t is the threshold voltage of the MESFET. PA1 Cgs is the capacitance between the gate electrode 27 and the source electrode 28. PA1 .epsilon. is the dielectric constant of the semiconductor substrate 21. PA1 .mu. is the mobility of the carrier. PA1 a is the thickness of the active layer 23. PA1 Lg is the gate length. PA1 Z is the gate width.
With greater transconductance of the MESFET, the MESFET has higher current amplification and can drive a greater capacitive load at a high speed. Moreover, with a higher cut-off frequency f.sub.T, the MESFET can switch at a higher speed. That is, with greater transconductance gm and higher cut-off frequency, the resulting MESFET performs better.
In order to increase the transconductance gm, gate length Lg of the MESFET is shortened, then the smaller capacitance Cgs between the gate electrode and the source electrode is obtained, therefore, the higher cut-off frequency is obtained. From this viewpoint, there has been an attempt to improve MESFET performance by decreasing the gate length Lg. However, the MESFET with the shorter gate length Lg causes short-channel effects which harm the performance of the GaAs MESFET, wherein the short-channel effects are the problems that the transconductance gm cannot increase as expected, the threshold voltage of the MESFET varies to the positive side, and the current cut-off characteristic is inferior. More particularly, the short-channel effects occur in the self-aligned MESFET whose high impurity concentration region is adjacent to the gate region.
The short-channel effects are said to be caused by a substrate leakage current between the high impurity concentration regions formed at both sides of the gate region through the semiconductor substrate. As described above, in order to obtain a higher performance of the MESFET, it is necessary to shorten the gate length Lg and suppress the aforementioned short-channel effects.
In order to suppress the short-channel effects, a method was suggested which forms a p-type layer 29 with an opposite polarity to the n-type active layer 23, in the region between the active layer 23 and the semi-insulating semiconductor substrate 21 as shown in FIG. 2. The known methods of forming the p-type layer 29 are as follows:
(a) An Mg ion implantation method as described in "Submicron-gate self-aligned GaAs FET with p-type barrier layer fabricated by ion implantation", IEEE the 42nd Annual Device Research Conference, Santa Barbara, CA, paper V1B-5, 1984 by K. Matsumoto et al. PA0 (b) A C and O ions implantation method as described in "The effect of substrate purity on short-channel effects of GaAs MESFET's", IEEE Proceedings of the 16th Conference Solid State Devices and materials (Kobe), pp. 395-398, 1984 by H. Nakamura et al. PA0 (c) A Be ion implantation method as described in "Below 10 ps/gate operation with buried p-layer SAINT FET's", Electron Letters, vol. 20, no. 25/26, pp. 1029-1031, 1984 by K. Yamasaki et al.
In the above methods, a pn junction is formed between a p-type layer and a n-type layer, and the potential barrier formed by the pn junction can suppress the aforementioned substrate leakage current.
In addition, another method for suppressing the substrate leakage current was suggested as shown in FIG. 3. In the method, a buffer layer 30 is formed between the active layer 22 and the semi-insulating semiconductor substrate 21, wherein the buffer layer 30 is made of a semiconductor such as Al.sub.0.3 Ga.sub.0.7 As with a small electron affinity and a wider forbidden energy band than those made of GaAs. In the MESFET with the buffer layer 30, the difference of the electron affinity between the n-type GaAs active layer 22 and the Al.sub.0.3 Ga.sub.0.7 As buffer layer 30 causes a potential barrier which is a discontinuous portion of conduction band as shown in FIG. 6(A), electrons are confined in the GaAs active layer 22 by the potential barrier. Thus, the substrate leakage current can be suppressed.
In order to form buffer layer 30 an Al.sub.0.3 Ga.sub.0.7 As buffer layer is first formed in a GaAs substrate 21 by an epitaxial growth method such as molecular beam epitaxial growth, or metal organic chemical vapor epitaxial growth etc., a GaAs active layer 22 is formed above the Al.sub.0.3 Ga.sub.0.7 As buffer layer 30. The MESFET with a buffer layer formed by molecular beam epitaxial growth method was described in "Characteristics of Submicron Gate GaAs FET's With Al.sub.0.3 Ga.sub.0.7 As Buffers: Effects of Interface Quality", IEEE Electron Device Letters, Vol. EDL-3, No. 2, 1982 by W. Kopp et al., on the other hand, the MESFET with a buffer layer formed by the metal organic chemical epitaxial growth method was described in IEEE Proceedings of the 14th Conference on Solid State Devices, Tokyo, 1982 by K. Ohata et al.
The aforementioned p-type layer formation can effectively suppress the substrate leakage current which mainly causes the short-channel effect; however, the p-type layer which is not completely depleted may increase the parasitic capacitance. As a result, the p-type layer may reduce the high speed characteristic of the MESFET. Therefore, it is necessary to form the p-type layer by correctly controlling the profile of the p-type layer, that is, precisely controlling the ion implantation. Even if the p-type layer with an ideal ion profile is formed by precisely controlling implantation, a difficult problem relating to the precise control of the profile of the p-type layer during the annealing process results since it unknown how the thermal diffusion activates the impurity ion during the annealing process.
The p-type layer formation increases the dose of the impurity ion and increases the impurity scattering effect to the electron in the active layer, thereby the electron mobility in the active layer decreases. As a result, there may be a problem that the gradient of the rising part in the static voltage-current characteristic of the MESFET becomes small due to electron mobility in the active layer.
On the other hand, the AlGaAs buffer layer formation can effectively suppress the substrate leakage current as well as the p-type layer formation. Al.sub.x Ga.sub.(1-x) As is mixed crystal semiconductor of AlAs and GaAs, various material constants, such as lattice constant, forbidden energy band, and electron affinity etc. can be changed by changing the mole fraction of the mixed crystal semiconductor. In the MESFET with a hetero junction of Al.sub.x Ga.sub.(1-x) As and GaAs, an ideal hetero interface can be obtained almost without lattice mismatching, since the lattice constant of AlAs is almost similar to the lattice constant of GaAs, wherein the lattice constant of GaAs is 5.65 .ANG., whereas the lattice constant of AlAs is 5.66 .ANG.. Therefore, the MESFET with the ideal hetero interface has the advantage that an increment of the electron scattering due to lattice mismatching can be prevented.
It is necessary to control the thickness of the active layer precisely which is formed by the epitaxial growth method, because the threshold voltage of a GaAs MESFET depends on the thickness of the active layer. In addition, in order to form a number of MESFETS with a constant threshold voltage for use in integrated circuits, it is necessary to form the active layer with a uniform thickness over the whole area of a wafer with a large diameter such as 2 inches. However, it is impossible to form the active layer with a uniform thickness over the whole area of a wafer by the teaching of the prior art. This difficulty is an obstacle in the manufacturing of a number of MESFETs having a uniform active layer using an integrated circuit technique.
A further difficulty inherent in the prior art MESFETS is that only one sort of threshold voltage can be obtained in the MESFET with the active layer formed by the conventional epitaxial growth method, for example, only depletion type MESFETs can be provided on one common substate. Therefore, there may be restriction in circuit construction and the problem arises that it is necessary to form a separation between two adjacent elements.
In the aforementioned epitaxial growth method, not only is the apparatus very large, but also the production process is very complex, and the throughout is very slow. Therefore, the cost and performance of the MESFET depends on the epitaxial growth process.
Moreover, in an integrated circuit comprising a GaAs MESFET, Direct coupled FET logic, which is called "DCFL" below, has been a noticeable device, since the integration density is higher and also the dissipation power is smaller as compared to another sort of logic circuit. However, the logic swing of the DCFL is limited by the Schottky barrier height of the GaAs MESFET. For example, the logic swing of the conventional DCFL is only 0.6 V, therefore, the conventional DCFL has a disadvantage that the conventional DCFL becomes unstable by the dispersion of the threshold voltage. As a result, a large scale integrated circuit with the DCFLs can not be made.
In order to obtain a larger logic swing than the DCFL, a few improvements have been developed by circuit techniques such as buffered FET logic and source coupled FET logic. These logic circuits have the disadvantages that the dissipation power is high and the number of elements are necessary for fabricating a gate circuit than that of the aforementioned DCFL. Therefore, it is difficult to provide a large scale integrated circuit comprising buffered FET logic, or source couple FET logic.
Moreover, recently, it has been suggested that a thin active layer with a high impurity concentration is used in order to increase a transconductance gm of the MESFET, however, the thin active layer with a higher impurity concentration leads to an inferior Schottky characteristic since the gate leakage current increases.